GS88418B Datasheet, GSI Technology

* FT pin for user-configurable flow through or pipelined operation
* Single/Dual Cycle Deselect Selectable
* ZQ mode pin for user-selectable high/low output d.

* 119-bump BGA package 512K x 18, 256K x 36 8Mb S/DCD Sync Burst SRAMs Flow Through/Pipeline Reads 200 MHz
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Applications The GS88418/36B is a 9,437,184-bit high performance synchronous SRAM with a 2-bit burst address counter. Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds applic.